1. Field of the Invention
The present invention generally relates to semiconductor devices, methods of producing semiconductor devices and semiconductor device mounting structures, and more particularly to a semiconductor device which has only a portion of leads exposed at a bottom surface of a package so as to improve the packaging density of the semiconductor device, a method of producing such a semiconductor device, and a semiconductor device mounting structure for mounting such a semiconductor device.
2. Description of the Related Art
Due to the recent improvements in reducing the size, increasing the operation speed and increasing the functions of electronic equipments, there are demands to realize similar improvements in semiconductor devices. In addition to these demands on the semiconductor devices per se, there are also demands to improve the packaging density of the semiconductor device when packaging the semiconductor device on a substrate.
Accordingly, although the majority of the existing semiconductor devices employ the surface mounting which connects the leads at the surface of the substrate, there are demands to further improve the packaging density of the semiconductor devices.
FIG. 1 shows a perspective view of an example of a conventional semiconductor device 1. FIG. 2 is a cross sectional view of this semiconductor device 1 taken along a line X--X in FIG. 1. For example, this type of semiconductor device was proposed in Japanese Laid-Open Patent Applications No.63-15453 and No.63-15451.
In FIGS. 1 and 2, the semiconductor device 1 generally includes a semiconductor chip 2, a resin package 3 which encapsulates the semiconductor chip 2, a plurality of leads 4, and a stage 7 on which the semiconductor chip 2 is mounted. One end 4a of the lead 4 is connected to the semiconductor chip 2 via a wire 5, and the other end of the lead 4 is exposed at a bottom surface 3a of the package 3 to form an external terminal 6. In other words, all parts of the semiconductor device 1 excluding the external terminals 6 of the leads 4 are encapsulated within the package 3.
Because the external terminals 6 of the leads 4 are exposed at the bottom surface 3a of the package 3 in this semiconductor device 1, the projecting length of the leads 4 on the outer side of the package 3 can be made small, thereby making it possible to improve the packaging density. In addition, the external terminals 6 of the leads 4 do not need to be bent as in the case of the conventional leads having the L-shape or gull-wing shape. As a result, no mold is required to bend the external terminals 6, thereby making it possible to simplify the production process and to reduce the production cost.
On the other hand, another type of semiconductor device was proposed in a Japanese Laid-Open Patent Application No.4-44347. According to this proposed semiconductor device, the leads are fixed to a circuit forming surface of the semiconductor chip via an insulative adhesive agent. In addition, the size of the package is reduced by encapsulating only the circuit forming surface or only the circuit forming surface and side surfaces of the semiconductor chip.
However, according to the semiconductor device 1 described above, the end 4a of the lead 4 is located on both sides of the semiconductor chip 2. As a result, there is a limit to reducing the size of the package 3, and there was a problem in that the size of the semiconductor device 1 cannot be reduced to a sufficient extent. In other words, the size of the semiconductor device ideally is approximately the same as the size of the semiconductor chip. However, the size of the semiconductor device 1 is approximately two or more times greater than the size of the semiconductor chip 2.
In addition, the semiconductor device 1 does not take the heat radiation into any consideration. That is, there was a problem in that the semiconductor device 1 cannot efficiently radiate the heat generated from the semiconductor chip 2 outside the package 3.
On the other hand, according to the semiconductor device proposed in the Japanese Laid-Open Patent Application No.4-44347, the leads which are connected to an external substrate are apart from the package, and thus, the transfer mold technique cannot be employed as the package forming technique, and the troublesome potting technique must be employed. As a result, this proposed semiconductor device requires troublesome processes to produce, and there were problems in that the production efficiency of the semiconductor device is poor and the production cost of the semiconductor device is high. It is theoretically possible to produce this semiconductor device by employing the transfer mold technique, however, this would require the mold to be made up of a large number of split molds, and this technique is impractical in that the mold would become extremely expensive.